Semiconductor Labs for Chip design
Semiconductor Design is a complex set of Electronics Design Automation (EDA) targeted towards generation of RTL for fabrication of Solid State Devices. SMLabs.co.in is a startup promoted by eOTF to provide generation of RTLs for different Fabs in India and abroad.
The focus here will be on using Open Source tools like Chisel using High Level Language like SCALA to provide Chip level design for RISC-V ISA for Co-processors that add value to Edge / Cloud based use case specifically targeting Quantum Universal Gate requirements based on C-NOT, Hadamard, Tiffoli, Clifford, S-Gate, Z-gate etc. These Quantum components need specific RTLs for different targets. Our end target will be Quantum Dots (QD) / Nitrogen Vacancy (NV) at room temperatures as they evolve. Meanwhile we will continue with the leading Semiconductor market Chip design trails for Super Conducting Quantum (SCQ).
We are building and assembling expertise in SCALA/Chisel followed by designing ISA extensions (Co-processors) based on Vega / Thejas32/64 with add-ons for
- Matrix multiplication
- Convolution
- Pooling
- Element-wise operations (addition, subtraction, multiplication, division)
- Reduction operations (sum, mean, max, min)
Our RTLs like Matrix Operation Unit (MoU), Vector Operation Units (VoU), Tensor Operation Unit (ToU) will be targeting Process Design Kits (PDKs) from Open /Licensed Fabrications provided like eFabless, Skywater, C-DAC (EIL), Tatas, Rigeeti etc.
There are many unlisted people behind the startup who would lend there names when appropriate. Those interested in joining this startup may send their resume to info@eotf.in stating their experience and requirements.
Please contact R.Prakash pramchan@eotf.in or Google Voice (650) 352-3944 / +91 8433821595. In case of queries to eOTF please send email to pramchan@eotf.in
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